The present invention relates in general to electronic systems and in particular to a system for mounting and flexibly interfacing the various components of an electronic system.
Before fabricating a new integrated circuit to be included in an electronic system, circuit designers usually employ computer programs to simulate the integrated circuit. Computer simulations help designers to test the new circuits in order to ensure they will perform as expected. However, circuit designers rarely perform computer simulations of entire circuit boards to ensure that all components on a board will work together as expected. Modern circuit board systems typically contain several relatively large integrated circuits, each of which alone may be difficult to simulate, and simulating an entire circuit board is often prohibitively time-consuming.
Thus, circuit designers usually fabricate a prototype circuit board and then test the actual operation of the system with the components mounted on the prototype board. Designers find it necessary during the system test and development process to fabricate several successive versions of a circuit board since even small changes in any component can require a change to the board. Also prototype circuit boards themselves may have design or construction defects and may have to be redesigned or refabricated when errors are discovered during the testing process.
Design and fabrication of each successive version of a prototype circuit board are expensive and can take several weeks to complete. The need to fabricate prototype circuit boards therefore often adds much time and expense to the process of developing new electronic systems.
In the early phases of the process of designing a large logic circuit, engineers typically partition the circuit into several smaller blocks of logic. The individual logic blocks initially have well-defined interfaces with one another and well-defined performance specifications, but the detailed specification of logic block designs may be left to much later in the design process. By delaying the detailed design of the individual logic blocks, the designer can focus on "higher level" aspects early in the design process. Partitioning a circuit into separate blocks with well-defined interfaces also enables a designer to delegate the detailed design of the blocks to independent teams that need not spend much time coordinating their designs.
Logic blocks are often implemented by custom-designed integrated circuits, but for many years the use of end-user programmable logic devices has also been well-accepted in digital logic design practice. These devices can be programmed by externally generated programming signals to implement user-specified digital logic operations. Early embodiments of the concept include Programmable Array Logic devices (PALs) and Programmable Logic Devices (PLDs). PALs and PLDs serve as a convenient means for integrating a small number (typically 5 to 10) of small or medium scale integrated devices. In recent years a new architectural variation of such programmable logic devices, the Field Programmable Gate Array (FPGA) offering a much higher capacity (thousands of gates) and architectural flexibility, has gained wide popularity.
PALs, PLDs and FPGAs are often employed during the early design phase of an electronic system to implement a block of logic even when that block is ultimately to be implemented by a custom designed integrated circuit. The use of these programmable devices allows the designer to quickly test and evaluate alternative ways of implementing a circuit. Programmable logic devices may also be incorporated into a final circuit design to permit end-users to easily alter operation of the block of logic to fit their particular needs.
Programmable logic devices are most suitable when the block of logic they are to implement can fit within a single device. When a block of logic is too large, the designer can partition the block into smaller blocks, each of which may be implemented by a separate programmable logic device or other components. However, the problem of interconnecting separate programmable logic devices often proves very troublesome. Integrated circuit devices are typically interconnected by copper traces on a printed circuit board and such circuit boards are inflexible and are time-consuming to manufacture. When a designer implements a logic block using several programmable logic devices, the designer must create a circuit board to interconnect them. When the designer subsequently changes the block design, he may be forced to create a new circuit board. Thus the advantage of being able to quickly modify and test various designs of a logic block implemented by programmable logic devices may be lost when the designer is forced to fabricate new circuit boards to interconnect them.
One solution is to impose severe restrictions on the permissible partitions of the logic block so as not to disturb the interconnections between programmable logic devices implementing the block. However, this is undesirable because it places unnecessary limitations on the design.
U.S. Pat. No. 5,036,473 entitled "Method of Using Electronically Reconfigurable Logic Circuits", issued Jul. 30, 1991 to Butts et al, attempts to solve the problems of both implementing and interconnecting blocks of logic of a prototype circuit by providing a circuit board on which several programmable logic devices and programmable crossbar switches are permanently mounted. There are also sockets for mounting other circuit components such as custom integrated circuits that may be supplied by a user.
A crossbar switch has several I/O pins and can be programmed by an externally generated programming signal to route data signals arriving on any one I/O pin to any other I/O pin. In the Butts et al system, the I/O pins of the crossbar switches are connected to one another and to the I/O ports of the programmable logic devices and user device sockets in a distributed fashion. By properly programming the crossbar switches, an I/O port of any programmable logic device or user supplied device can be connected to an I/O port of any other programmable logic device or to any other I/O port of any user-supplied device mounted on the board. With this system, when change to a block of logic implemented by programmable logic devices requires changes in interconnections therebetween, the interconnection changes can be quickly and easily handled by reprogramming the crossbar switches. No alteration in circuit board hardware is required.
Crossbar switches of the prior art may be either active or passive. An "active" crossbar switch includes buffers that actively drive signals at its output I/O pins in response to signals at its input I/O pins. Active buffering ensures that the signals are not degraded as they pass through the crossbar switches between programmable logic devices. A "passive" crossbar switch simply passes signals between its I/O pins without buffering. Passive crossbar switches can accommodate either unidirectional or bidirectional signals, but since the signals must pass through unidirectional buffers, prior art active crossbar switches can only accommodate unidirectional signals.
Butts et al disclose active buffering to interconnect programmable logic devices and user-supplied components mounted on the board. A problem arises when the block of logic to be implemented includes bi-directional buses. Butts et al suggest either avoiding bi-directional buses by partitioning bi-directional buses into two unidirectional buses (FIGS. 13 and 14) or using logic or gating in the crossbar switch to enable buffers in the crossbar switch (FIGS. 15 and 16). In the former case, the devices being interconnected must have an input and an output terminal because the "bi-directional" bus actually comprises two unidirectional buses. In the latter case, the devices being interconnected by a true bi-directional bus must supply the crossbar switch with an enable signal input indicating direction of signal flow.
These methods solve the problem of actively buffering "bi-directional" signals passing between components only when the designer has control over the implementation of the devices being interconnected. The designer must ensure that such devices have only unidirectional inputs and outputs or that the devices supply an extra direction indicating enable signal with each bi-directional input/output signal. In cases where the logic is entirely implemented by programmable logic devices, the designer does have such control over device implementation. However, in many cases the user may wish to interconnect existing integrated circuits that have true bi-directional input/output buses but which do not provide output direction indicating enable signals. In such a situation, the Butts et al system is unable to provide actively buffered bi-directional interfaces between circuit components.